All jobs
ASIC Design Verification Engineer - Specs
Snap Inc.
Eindhoven · Hybrid, 4 days in the officeSenior (5–10 years)Full-timePosted 5 Oct 2026
About the job
What you'll do
Responsible for the verification of AI ASIC designs, taking ownership of complex IP blocks and subsystems for edge AI and camera IPs. The role involves driving the project lifecycle from specification to coverage sign-off and collaborating cross-functionally to refine requirements.
What they're looking for
Requires 5+ years of experience in UVM, SystemVerilog, and coverage-driven verification with expertise in NPUs or image/video processing. Candidates must be proficient in RTL and experienced with modern CI/CD workflows and Git.
Full description