Todas as vagas
Hardware Security Engineer
Fortaegis
Amsterdam · PresencialSênior (5–10 anos)Tempo integralPublicada em 10 de jul. de 2026
Sobre a vaga
O que você vai fazer
Design and implement end-to-end RTL for hardware cryptographic modules and accelerators. Integrate robust countermeasures and use SCA tools to protect designs against physical and side-channel attacks.
O que eles procuram
Proven experience in writing RTL for ASIC or FPGA with a deep understanding of cryptographic algorithms. Expertise in implementing side-channel countermeasures and utilizing SCA tools is required.
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