Package Design Engineer
About the job
What you'll do
Design and optimize large-form-factor package substrates for high-performance ML and AI systems, managing the process from feasibility studies and test vehicles through product design, reviews, and manufacturing documentation. Develop design methodologies and CAD flows, drive chip-package-system co-design and production sign-off, and coordinate with SI/PI, thermal, mechanical, assembly, and PCB teams.
What they're looking for
A bachelor's degree in a relevant engineering, technology, or science field, or equivalent practical experience, and at least eight years of chip package substrate design experience using Cadence APD or Mentor Expedition are required. Candidates should have experience with substrate layout, verification, DFM, production tape-outs, design automation, and scripting; upper-intermediate or higher English is required.